From linuxer, 10 Months ago, written in Plain Text.
Embed
  1. CPU 0:
  2.    vendor_id = "AuthenticAMD"
  3.    version information (1/eax):
  4.       processor type  = primary processor (0)
  5.       family          = 0xf (15)
  6.       model           = 0x4 (4)
  7.       stepping id     = 0x2 (2)
  8.       extended family = 0x1 (1)
  9.       extended model  = 0x0 (0)
  10.       (family synth)  = 0x10 (16)
  11.       (model synth)   = 0x4 (4)
  12.       (simple synth)  = AMD Athlon (unknown type) (Regor/Propus/Shanghai/Callisto/Heka/Deneb RB-C2) [K10], 45nm
  13.    miscellaneous (1/ebx):
  14.       process local APIC physical ID = 0x0 (0)
  15.       maximum IDs for CPUs in pkg    = 0x4 (4)
  16.       CLFLUSH line size              = 0x8 (8)
  17.       brand index                    = 0x0 (0)
  18.    brand id = 0x00 (0): unknown
  19.    feature information (1/edx):
  20.       x87 FPU on chip                        = true
  21.       VME: virtual-8086 mode enhancement     = true
  22.       DE: debugging extensions               = true
  23.       PSE: page size extensions              = true
  24.       TSC: time stamp counter                = true
  25.       RDMSR and WRMSR support                = true
  26.       PAE: physical address extensions       = true
  27.       MCE: machine check exception           = true
  28.       CMPXCHG8B inst.                        = true
  29.       APIC on chip                           = true
  30.       SYSENTER and SYSEXIT                   = true
  31.       MTRR: memory type range registers      = true
  32.       PTE global bit                         = true
  33.       MCA: machine check architecture        = true
  34.       CMOV: conditional move/compare instr   = true
  35.       PAT: page attribute table              = true
  36.       PSE-36: page size extension            = true
  37.       PSN: processor serial number           = false
  38.       CLFLUSH instruction                    = true
  39.       DS: debug store                        = false
  40.       ACPI: thermal monitor and clock ctrl   = false
  41.       MMX Technology                         = true
  42.       FXSAVE/FXRSTOR                         = true
  43.       SSE extensions                         = true
  44.       SSE2 extensions                        = true
  45.       SS: self snoop                         = false
  46.       hyper-threading / multi-core supported = true
  47.       TM: therm. monitor                     = false
  48.       IA64                                   = false
  49.       PBE: pending break event               = false
  50.    feature information (1/ecx):
  51.       PNI/SSE3: Prescott New Instructions     = true
  52.       PCLMULDQ instruction                    = false
  53.       DTES64: 64-bit debug store              = false
  54.       MONITOR/MWAIT                           = true
  55.       CPL-qualified debug store               = false
  56.       VMX: virtual machine extensions         = false
  57.       SMX: safer mode extensions              = false
  58.       Enhanced Intel SpeedStep Technology     = false
  59.       TM2: thermal monitor 2                  = false
  60.       SSSE3 extensions                        = false
  61.       context ID: adaptive or shared L1 data  = false
  62.       SDBG: IA32_DEBUG_INTERFACE              = false
  63.       FMA instruction                         = false
  64.       CMPXCHG16B instruction                  = true
  65.       xTPR disable                            = false
  66.       PDCM: perfmon and debug                 = false
  67.       PCID: process context identifiers       = false
  68.       DCA: direct cache access                = false
  69.       SSE4.1 extensions                       = false
  70.       SSE4.2 extensions                       = false
  71.       x2APIC: extended xAPIC support          = false
  72.       MOVBE instruction                       = false
  73.       POPCNT instruction                      = true
  74.       time stamp counter deadline             = false
  75.       AES instruction                         = false
  76.       XSAVE/XSTOR states                      = false
  77.       OS-enabled XSAVE/XSTOR                  = false
  78.       AVX: advanced vector extensions         = false
  79.       F16C half-precision convert instruction = false
  80.       RDRAND instruction                      = false
  81.       hypervisor guest status                 = false
  82.    cache and TLB information (2):
  83.    processor serial number = 0010-0F42-0000-0000-0000-0000
  84.    MONITOR/MWAIT (5):
  85.       smallest monitor-line size (bytes)       = 0x40 (64)
  86.       largest monitor-line size (bytes)        = 0x40 (64)
  87.       enum of Monitor-MWAIT exts supported     = true
  88.       supports intrs as break-event for MWAIT  = true
  89.       number of C0 sub C-states using MWAIT    = 0x0 (0)
  90.       number of C1 sub C-states using MWAIT    = 0x0 (0)
  91.       number of C2 sub C-states using MWAIT    = 0x0 (0)
  92.       number of C3 sub C-states using MWAIT    = 0x0 (0)
  93.       number of C4 sub C-states using MWAIT    = 0x0 (0)
  94.       number of C5 sub C-states using MWAIT    = 0x0 (0)
  95.       number of C6 sub C-states using MWAIT    = 0x0 (0)
  96.       number of C7 sub C-states using MWAIT    = 0x0 (0)
  97.    extended processor signature (0x80000001/eax):
  98.       family/generation = 0xf (15)
  99.       model           = 0x4 (4)
  100.       stepping id     = 0x2 (2)
  101.       extended family = 0x1 (1)
  102.       extended model  = 0x0 (0)
  103.       (family synth)  = 0x10 (16)
  104.       (model synth)   = 0x4 (4)
  105.       (simple synth)  = AMD Athlon (unknown type) (Regor/Propus/Shanghai/Callisto/Heka/Deneb RB-C2) [K10], 45nm
  106.    extended feature flags (0x80000001/edx):
  107.       x87 FPU on chip                       = true
  108.       virtual-8086 mode enhancement         = true
  109.       debugging extensions                  = true
  110.       page size extensions                  = true
  111.       time stamp counter                    = true
  112.       RDMSR and WRMSR support               = true
  113.       physical address extensions           = true
  114.       machine check exception               = true
  115.       CMPXCHG8B inst.                       = true
  116.       APIC on chip                          = true
  117.       SYSCALL and SYSRET instructions       = true
  118.       memory type range registers           = true
  119.       global paging extension               = true
  120.       machine check architecture            = true
  121.       conditional move/compare instruction  = true
  122.       page attribute table                  = true
  123.       page size extension                   = true
  124.       multiprocessing capable               = false
  125.       no-execute page protection            = true
  126.       AMD multimedia instruction extensions = true
  127.       MMX Technology                        = true
  128.       FXSAVE/FXRSTOR                        = true
  129.       SSE extensions                        = true
  130.       1-GB large page support               = true
  131.       RDTSCP                                = true
  132.       long mode (AA-64)                     = true
  133.       3DNow! instruction extensions         = true
  134.       3DNow! instructions                   = true
  135.    extended brand id (0x80000001/ebx):
  136.       raw          = 0x10001b76 (268442486)
  137.       BrandId      = 0x1b76 (7030)
  138.       str1         = 0x3 (3)
  139.       str2         = 0x6 (6)
  140.       PartialModel = 0x37 (55)
  141.       PG           = 0x0 (0)
  142.       PkgType      = AM2r2/AM3 (1)
  143.    AMD feature flags (0x80000001/ecx):
  144.       LAHF/SAHF supported in 64-bit mode     = true
  145.       CMP Legacy                             = true
  146.       SVM: secure virtual machine            = true
  147.       extended APIC space                    = true
  148.       AltMovCr8                              = true
  149.       LZCNT advanced bit manipulation        = true
  150.       SSE4A support                          = true
  151.       misaligned SSE mode                    = true
  152.       3DNow! PREFETCH/PREFETCHW instructions = true
  153.       OS visible workaround                  = true
  154.       instruction based sampling             = true
  155.       XOP support                            = false
  156.       SKINIT/STGI support                    = true
  157.       watchdog timer support                 = true
  158.       lightweight profiling support          = false
  159.       4-operand FMA instruction              = false
  160.       TCE: translation cache extension       = false
  161.       NodeId MSR C001100C                    = true
  162.       TBM support                            = false
  163.       topology extensions                    = false
  164.       core performance counter extensions    = false
  165.       NB/DF performance counter extensions   = false
  166.       data breakpoint extension              = false
  167.       performance time-stamp counter support = false
  168.       LLC performance counter extensions     = false
  169.       MWAITX/MONITORX supported              = false
  170.       Address mask extension support         = false
  171.    brand = "AMD Phenom(tm) II X4 955 Processor"
  172.    L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
  173.       instruction # entries     = 0x10 (16)
  174.       instruction associativity = 0xff (255)
  175.       data # entries            = 0x30 (48)
  176.       data associativity        = 0xff (255)
  177.    L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
  178.       instruction # entries     = 0x20 (32)
  179.       instruction associativity = 0xff (255)
  180.       data # entries            = 0x30 (48)
  181.       data associativity        = 0xff (255)
  182.    L1 data cache information (0x80000005/ecx):
  183.       line size (bytes) = 0x40 (64)
  184.       lines per tag     = 0x1 (1)
  185.       associativity     = 0x2 (2)
  186.       size (KB)         = 0x40 (64)
  187.    L1 instruction cache information (0x80000005/edx):
  188.       line size (bytes) = 0x40 (64)
  189.       lines per tag     = 0x1 (1)
  190.       associativity     = 0x2 (2)
  191.       size (KB)         = 0x40 (64)
  192.    L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
  193.       instruction # entries     = 0x0 (0)
  194.       instruction associativity = L2 off (0)
  195.       data # entries            = 0x80 (128)
  196.       data associativity        = 2-way (2)
  197.    L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
  198.       instruction # entries     = 0x200 (512)
  199.       instruction associativity = 4-way (4)
  200.       data # entries            = 0x200 (512)
  201.       data associativity        = 4-way (4)
  202.    L2 unified cache information (0x80000006/ecx):
  203.       line size (bytes) = 0x40 (64)
  204.       lines per tag     = 0x1 (1)
  205.       associativity     = 16-way (8)
  206.       size (KB)         = 0x200 (512)
  207.    L3 cache information (0x80000006/edx):
  208.       line size (bytes)     = 0x40 (64)
  209.       lines per tag         = 0x1 (1)
  210.       associativity         = 48-way (11)
  211.       size (in 512KB units) = 0xc (12)
  212.    RAS Capability (0x80000007/ebx):
  213.       MCA overflow recovery support = false
  214.       SUCCOR support                = false
  215.       HWA: hardware assert support  = false
  216.       scalable MCA support          = false
  217.    Advanced Power Management Features (0x80000007/ecx):
  218.       CmpUnitPwrSampleTimeRatio = 0x0 (0)
  219.    Advanced Power Management Features (0x80000007/edx):
  220.       TS: temperature sensing diode           = true
  221.       FID: frequency ID control               = false
  222.       VID: voltage ID control                 = false
  223.       TTP: thermal trip                       = true
  224.       TM: thermal monitor                     = true
  225.       STC: software thermal control           = true
  226.       100 MHz multiplier control              = true
  227.       hardware P-State control                = true
  228.       TscInvariant                            = true
  229.       CPB: core performance boost             = false
  230.       read-only effective frequency interface = false
  231.       processor feedback interface            = false
  232.       APM power reporting                     = false
  233.       connected standby                       = false
  234.       RAPL: running average power limit       = false
  235.    Physical Address and Linear Address Size (0x80000008/eax):
  236.       maximum physical address bits         = 0x30 (48)
  237.       maximum linear (virtual) address bits = 0x30 (48)
  238.       maximum guest physical address bits   = 0x0 (0)
  239.    Extended Feature Extensions ID (0x80000008/ebx):
  240.       CLZERO instruction                       = false
  241.       instructions retired count support       = false
  242.       always save/restore error pointers       = false
  243.       RDPRU instruction                        = false
  244.       memory bandwidth enforcement             = false
  245.       WBNOINVD instruction                     = false
  246.       IBPB: indirect branch prediction barrier = false
  247.       IBRS: indirect branch restr speculation  = false
  248.       STIBP: 1 thr indirect branch predictor   = false
  249.       STIBP always on preferred mode           = false
  250.       ppin processor id number supported       = false
  251.       SSBD: speculative store bypass disable   = false
  252.       virtualized SSBD                         = false
  253.       SSBD fixed in hardware                   = false
  254.    Size Identifiers (0x80000008/ecx):
  255.       number of CPU cores                 = 0x4 (4)
  256.       ApicIdCoreIdSize                    = 0x2 (2)
  257.       performance time-stamp counter size = 0x0 (0)
  258.    Feature Extended Size (0x80000008/edx):
  259.       RDPRU instruction max input support = 0x0 (0)
  260.    SVM Secure Virtual Machine (0x8000000a/eax):
  261.       SvmRev: SVM revision = 0x1 (1)
  262.    SVM Secure Virtual Machine (0x8000000a/edx):
  263.       nested paging                           = true
  264.       LBR virtualization                      = true
  265.       SVM lock                                = true
  266.       NRIP save                               = true
  267.       MSR based TSC rate control              = false
  268.       VMCB clean bits support                 = false
  269.       flush by ASID                           = false
  270.       decode assists                          = false
  271.       SSSE3/SSE5 opcode set disable           = false
  272.       pause intercept filter                  = false
  273.       pause filter threshold                  = false
  274.       AVIC: AMD virtual interrupt controller  = false
  275.       virtualized VMLOAD/VMSAVE               = false
  276.       virtualized global interrupt flag (GIF) = false
  277.       GMET: guest mode execute trap           = false
  278.       guest Spec_ctl support                  = false
  279.    NASID: number of address space identifiers = 0x40 (64):
  280.    L1 TLB information: 1G pages (0x80000019/eax):
  281.       instruction # entries     = 0x0 (0)
  282.       instruction associativity = L2 off (0)
  283.       data # entries            = 0x30 (48)
  284.       data associativity        = full (15)
  285.    L2 TLB information: 1G pages (0x80000019/ebx):
  286.       instruction # entries     = 0x0 (0)
  287.       instruction associativity = L2 off (0)
  288.       data # entries            = 0x10 (16)
  289.       data associativity        = 8-way (6)
  290.    SVM Secure Virtual Machine (0x8000001a/eax):
  291.       128-bit SSE executed full-width = true
  292.       MOVU* better than MOVL*/MOVH*   = true
  293.       256-bit SSE executed full-width = false
  294.    Instruction Based Sampling Identifiers (0x8000001b/eax):
  295.       IBS feature flags valid                  = true
  296.       IBS fetch sampling                       = true
  297.       IBS execution sampling                   = true
  298.       read write of op counter                 = true
  299.       op counting mode                         = true
  300.       branch target address reporting          = false
  301.       IbsOpCurCnt and IbsOpMaxCnt extend 7     = false
  302.       invalid RIP indication support           = false
  303.       fused branch micro-op indication support = false
  304.       IBS fetch control extended MSR support   = false
  305.       IBS op data 4 MSR support                = false
  306.    (instruction supported synth):
  307.       CMPXCHG8B                = true
  308.       conditional move/compare = true
  309.       PREFETCH/PREFETCHW       = true
  310.    (multi-processing synth) = multi-core (c=4)
  311.    (multi-processing method) = AMD
  312.    (APIC widths synth): CORE_width=2 SMT_width=0
  313.    (APIC synth): PKG_ID=0 CORE_ID=0 SMT_ID=0
  314.    (uarch synth) = AMD K10, 45nm
  315.    (synth) = AMD Phenom II X4 (Deneb RB-C2) 955 Processor [K10], 45nm
  316. CPU 1:
  317.    vendor_id = "AuthenticAMD"
  318.    version information (1/eax):
  319.       processor type  = primary processor (0)
  320.       family          = 0xf (15)
  321.       model           = 0x4 (4)
  322.       stepping id     = 0x2 (2)
  323.       extended family = 0x1 (1)
  324.       extended model  = 0x0 (0)
  325.       (family synth)  = 0x10 (16)
  326.       (model synth)   = 0x4 (4)
  327.       (simple synth)  = AMD Athlon (unknown type) (Regor/Propus/Shanghai/Callisto/Heka/Deneb RB-C2) [K10], 45nm
  328.    miscellaneous (1/ebx):
  329.       process local APIC physical ID = 0x1 (1)
  330.       maximum IDs for CPUs in pkg    = 0x4 (4)
  331.       CLFLUSH line size              = 0x8 (8)
  332.       brand index                    = 0x0 (0)
  333.    brand id = 0x00 (0): unknown
  334.    feature information (1/edx):
  335.       x87 FPU on chip                        = true
  336.       VME: virtual-8086 mode enhancement     = true
  337.       DE: debugging extensions               = true
  338.       PSE: page size extensions              = true
  339.       TSC: time stamp counter                = true
  340.       RDMSR and WRMSR support                = true
  341.       PAE: physical address extensions       = true
  342.       MCE: machine check exception           = true
  343.       CMPXCHG8B inst.                        = true
  344.       APIC on chip                           = true
  345.       SYSENTER and SYSEXIT                   = true
  346.       MTRR: memory type range registers      = true
  347.       PTE global bit                         = true
  348.       MCA: machine check architecture        = true
  349.       CMOV: conditional move/compare instr   = true
  350.       PAT: page attribute table              = true
  351.       PSE-36: page size extension            = true
  352.       PSN: processor serial number           = false
  353.       CLFLUSH instruction                    = true
  354.       DS: debug store                        = false
  355.       ACPI: thermal monitor and clock ctrl   = false
  356.       MMX Technology                         = true
  357.       FXSAVE/FXRSTOR                         = true
  358.       SSE extensions                         = true
  359.       SSE2 extensions                        = true
  360.       SS: self snoop                         = false
  361.       hyper-threading / multi-core supported = true
  362.       TM: therm. monitor                     = false
  363.       IA64                                   = false
  364.       PBE: pending break event               = false
  365.    feature information (1/ecx):
  366.       PNI/SSE3: Prescott New Instructions     = true
  367.       PCLMULDQ instruction                    = false
  368.       DTES64: 64-bit debug store              = false
  369.       MONITOR/MWAIT                           = true
  370.       CPL-qualified debug store               = false
  371.       VMX: virtual machine extensions         = false
  372.       SMX: safer mode extensions              = false
  373.       Enhanced Intel SpeedStep Technology     = false
  374.       TM2: thermal monitor 2                  = false
  375.       SSSE3 extensions                        = false
  376.       context ID: adaptive or shared L1 data  = false
  377.       SDBG: IA32_DEBUG_INTERFACE              = false
  378.       FMA instruction                         = false
  379.       CMPXCHG16B instruction                  = true
  380.       xTPR disable                            = false
  381.       PDCM: perfmon and debug                 = false
  382.       PCID: process context identifiers       = false
  383.       DCA: direct cache access                = false
  384.       SSE4.1 extensions                       = false
  385.       SSE4.2 extensions                       = false
  386.       x2APIC: extended xAPIC support          = false
  387.       MOVBE instruction                       = false
  388.       POPCNT instruction                      = true
  389.       time stamp counter deadline             = false
  390.       AES instruction                         = false
  391.       XSAVE/XSTOR states                      = false
  392.       OS-enabled XSAVE/XSTOR                  = false
  393.       AVX: advanced vector extensions         = false
  394.       F16C half-precision convert instruction = false
  395.       RDRAND instruction                      = false
  396.       hypervisor guest status                 = false
  397.    cache and TLB information (2):
  398.    processor serial number = 0010-0F42-0000-0000-0000-0000
  399.    MONITOR/MWAIT (5):
  400.       smallest monitor-line size (bytes)       = 0x40 (64)
  401.       largest monitor-line size (bytes)        = 0x40 (64)
  402.       enum of Monitor-MWAIT exts supported     = true
  403.       supports intrs as break-event for MWAIT  = true
  404.       number of C0 sub C-states using MWAIT    = 0x0 (0)
  405.       number of C1 sub C-states using MWAIT    = 0x0 (0)
  406.       number of C2 sub C-states using MWAIT    = 0x0 (0)
  407.       number of C3 sub C-states using MWAIT    = 0x0 (0)
  408.       number of C4 sub C-states using MWAIT    = 0x0 (0)
  409.       number of C5 sub C-states using MWAIT    = 0x0 (0)
  410.       number of C6 sub C-states using MWAIT    = 0x0 (0)
  411.       number of C7 sub C-states using MWAIT    = 0x0 (0)
  412.    extended processor signature (0x80000001/eax):
  413.       family/generation = 0xf (15)
  414.       model           = 0x4 (4)
  415.       stepping id     = 0x2 (2)
  416.       extended family = 0x1 (1)
  417.       extended model  = 0x0 (0)
  418.       (family synth)  = 0x10 (16)
  419.       (model synth)   = 0x4 (4)
  420.       (simple synth)  = AMD Athlon (unknown type) (Regor/Propus/Shanghai/Callisto/Heka/Deneb RB-C2) [K10], 45nm
  421.    extended feature flags (0x80000001/edx):
  422.       x87 FPU on chip                       = true
  423.       virtual-8086 mode enhancement         = true
  424.       debugging extensions                  = true
  425.       page size extensions                  = true
  426.       time stamp counter                    = true
  427.       RDMSR and WRMSR support               = true
  428.       physical address extensions           = true
  429.       machine check exception               = true
  430.       CMPXCHG8B inst.                       = true
  431.       APIC on chip                          = true
  432.       SYSCALL and SYSRET instructions       = true
  433.       memory type range registers           = true
  434.       global paging extension               = true
  435.       machine check architecture            = true
  436.       conditional move/compare instruction  = true
  437.       page attribute table                  = true
  438.       page size extension                   = true
  439.       multiprocessing capable               = false
  440.       no-execute page protection            = true
  441.       AMD multimedia instruction extensions = true
  442.       MMX Technology                        = true
  443.       FXSAVE/FXRSTOR                        = true
  444.       SSE extensions                        = true
  445.       1-GB large page support               = true
  446.       RDTSCP                                = true
  447.       long mode (AA-64)                     = true
  448.       3DNow! instruction extensions         = true
  449.       3DNow! instructions                   = true
  450.    extended brand id (0x80000001/ebx):
  451.       raw          = 0x10001b76 (268442486)
  452.       BrandId      = 0x1b76 (7030)
  453.       str1         = 0x3 (3)
  454.       str2         = 0x6 (6)
  455.       PartialModel = 0x37 (55)
  456.       PG           = 0x0 (0)
  457.       PkgType      = AM2r2/AM3 (1)
  458.    AMD feature flags (0x80000001/ecx):
  459.       LAHF/SAHF supported in 64-bit mode     = true
  460.       CMP Legacy                             = true
  461.       SVM: secure virtual machine            = true
  462.       extended APIC space                    = true
  463.       AltMovCr8                              = true
  464.       LZCNT advanced bit manipulation        = true
  465.       SSE4A support                          = true
  466.       misaligned SSE mode                    = true
  467.       3DNow! PREFETCH/PREFETCHW instructions = true
  468.       OS visible workaround                  = true
  469.       instruction based sampling             = true
  470.       XOP support                            = false
  471.       SKINIT/STGI support                    = true
  472.       watchdog timer support                 = true
  473.       lightweight profiling support          = false
  474.       4-operand FMA instruction              = false
  475.       TCE: translation cache extension       = false
  476.       NodeId MSR C001100C                    = true
  477.       TBM support                            = false
  478.       topology extensions                    = false
  479.       core performance counter extensions    = false
  480.       NB/DF performance counter extensions   = false
  481.       data breakpoint extension              = false
  482.       performance time-stamp counter support = false
  483.       LLC performance counter extensions     = false
  484.       MWAITX/MONITORX supported              = false
  485.       Address mask extension support         = false
  486.    brand = "AMD Phenom(tm) II X4 955 Processor"
  487.    L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
  488.       instruction # entries     = 0x10 (16)
  489.       instruction associativity = 0xff (255)
  490.       data # entries            = 0x30 (48)
  491.       data associativity        = 0xff (255)
  492.    L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
  493.       instruction # entries     = 0x20 (32)
  494.       instruction associativity = 0xff (255)
  495.       data # entries            = 0x30 (48)
  496.       data associativity        = 0xff (255)
  497.    L1 data cache information (0x80000005/ecx):
  498.       line size (bytes) = 0x40 (64)
  499.       lines per tag     = 0x1 (1)
  500.       associativity     = 0x2 (2)
  501.       size (KB)         = 0x40 (64)
  502.    L1 instruction cache information (0x80000005/edx):
  503.       line size (bytes) = 0x40 (64)
  504.       lines per tag     = 0x1 (1)
  505.       associativity     = 0x2 (2)
  506.       size (KB)         = 0x40 (64)
  507.    L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
  508.       instruction # entries     = 0x0 (0)
  509.       instruction associativity = L2 off (0)
  510.       data # entries            = 0x80 (128)
  511.       data associativity        = 2-way (2)
  512.    L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
  513.       instruction # entries     = 0x200 (512)
  514.       instruction associativity = 4-way (4)
  515.       data # entries            = 0x200 (512)
  516.       data associativity        = 4-way (4)
  517.    L2 unified cache information (0x80000006/ecx):
  518.       line size (bytes) = 0x40 (64)
  519.       lines per tag     = 0x1 (1)
  520.       associativity     = 16-way (8)
  521.       size (KB)         = 0x200 (512)
  522.    L3 cache information (0x80000006/edx):
  523.       line size (bytes)     = 0x40 (64)
  524.       lines per tag         = 0x1 (1)
  525.       associativity         = 48-way (11)
  526.       size (in 512KB units) = 0xc (12)
  527.    RAS Capability (0x80000007/ebx):
  528.       MCA overflow recovery support = false
  529.       SUCCOR support                = false
  530.       HWA: hardware assert support  = false
  531.       scalable MCA support          = false
  532.    Advanced Power Management Features (0x80000007/ecx):
  533.       CmpUnitPwrSampleTimeRatio = 0x0 (0)
  534.    Advanced Power Management Features (0x80000007/edx):
  535.       TS: temperature sensing diode           = true
  536.       FID: frequency ID control               = false
  537.       VID: voltage ID control                 = false
  538.       TTP: thermal trip                       = true
  539.       TM: thermal monitor                     = true
  540.       STC: software thermal control           = true
  541.       100 MHz multiplier control              = true
  542.       hardware P-State control                = true
  543.       TscInvariant                            = true
  544.       CPB: core performance boost             = false
  545.       read-only effective frequency interface = false
  546.       processor feedback interface            = false
  547.       APM power reporting                     = false
  548.       connected standby                       = false
  549.       RAPL: running average power limit       = false
  550.    Physical Address and Linear Address Size (0x80000008/eax):
  551.       maximum physical address bits         = 0x30 (48)
  552.       maximum linear (virtual) address bits = 0x30 (48)
  553.       maximum guest physical address bits   = 0x0 (0)
  554.    Extended Feature Extensions ID (0x80000008/ebx):
  555.       CLZERO instruction                       = false
  556.       instructions retired count support       = false
  557.       always save/restore error pointers       = false
  558.       RDPRU instruction                        = false
  559.       memory bandwidth enforcement             = false
  560.       WBNOINVD instruction                     = false
  561.       IBPB: indirect branch prediction barrier = false
  562.       IBRS: indirect branch restr speculation  = false
  563.       STIBP: 1 thr indirect branch predictor   = false
  564.       STIBP always on preferred mode           = false
  565.       ppin processor id number supported       = false
  566.       SSBD: speculative store bypass disable   = false
  567.       virtualized SSBD                         = false
  568.       SSBD fixed in hardware                   = false
  569.    Size Identifiers (0x80000008/ecx):
  570.       number of CPU cores                 = 0x4 (4)
  571.       ApicIdCoreIdSize                    = 0x2 (2)
  572.       performance time-stamp counter size = 0x0 (0)
  573.    Feature Extended Size (0x80000008/edx):
  574.       RDPRU instruction max input support = 0x0 (0)
  575.    SVM Secure Virtual Machine (0x8000000a/eax):
  576.       SvmRev: SVM revision = 0x1 (1)
  577.    SVM Secure Virtual Machine (0x8000000a/edx):
  578.       nested paging                           = true
  579.       LBR virtualization                      = true
  580.       SVM lock                                = true
  581.       NRIP save                               = true
  582.       MSR based TSC rate control              = false
  583.       VMCB clean bits support                 = false
  584.       flush by ASID                           = false
  585.       decode assists                          = false
  586.       SSSE3/SSE5 opcode set disable           = false
  587.       pause intercept filter                  = false
  588.       pause filter threshold                  = false
  589.       AVIC: AMD virtual interrupt controller  = false
  590.       virtualized VMLOAD/VMSAVE               = false
  591.       virtualized global interrupt flag (GIF) = false
  592.       GMET: guest mode execute trap           = false
  593.       guest Spec_ctl support                  = false
  594.    NASID: number of address space identifiers = 0x40 (64):
  595.    L1 TLB information: 1G pages (0x80000019/eax):
  596.       instruction # entries     = 0x0 (0)
  597.       instruction associativity = L2 off (0)
  598.       data # entries            = 0x30 (48)
  599.       data associativity        = full (15)
  600.    L2 TLB information: 1G pages (0x80000019/ebx):
  601.       instruction # entries     = 0x0 (0)
  602.       instruction associativity = L2 off (0)
  603.       data # entries            = 0x10 (16)
  604.       data associativity        = 8-way (6)
  605.    SVM Secure Virtual Machine (0x8000001a/eax):
  606.       128-bit SSE executed full-width = true
  607.       MOVU* better than MOVL*/MOVH*   = true
  608.       256-bit SSE executed full-width = false
  609.    Instruction Based Sampling Identifiers (0x8000001b/eax):
  610.       IBS feature flags valid                  = true
  611.       IBS fetch sampling                       = true
  612.       IBS execution sampling                   = true
  613.       read write of op counter                 = true
  614.       op counting mode                         = true
  615.       branch target address reporting          = false
  616.       IbsOpCurCnt and IbsOpMaxCnt extend 7     = false
  617.       invalid RIP indication support           = false
  618.       fused branch micro-op indication support = false
  619.       IBS fetch control extended MSR support   = false
  620.       IBS op data 4 MSR support                = false
  621.    (instruction supported synth):
  622.       CMPXCHG8B                = true
  623.       conditional move/compare = true
  624.       PREFETCH/PREFETCHW       = true
  625.    (multi-processing synth) = multi-core (c=4)
  626.    (multi-processing method) = AMD
  627.    (APIC widths synth): CORE_width=2 SMT_width=0
  628.    (APIC synth): PKG_ID=0 CORE_ID=1 SMT_ID=0
  629.    (uarch synth) = AMD K10, 45nm
  630.    (synth) = AMD Phenom II X4 (Deneb RB-C2) 955 Processor [K10], 45nm
  631. CPU 2:
  632.    vendor_id = "AuthenticAMD"
  633.    version information (1/eax):
  634.       processor type  = primary processor (0)
  635.       family          = 0xf (15)
  636.       model           = 0x4 (4)
  637.       stepping id     = 0x2 (2)
  638.       extended family = 0x1 (1)
  639.       extended model  = 0x0 (0)
  640.       (family synth)  = 0x10 (16)
  641.       (model synth)   = 0x4 (4)
  642.       (simple synth)  = AMD Athlon (unknown type) (Regor/Propus/Shanghai/Callisto/Heka/Deneb RB-C2) [K10], 45nm
  643.    miscellaneous (1/ebx):
  644.       process local APIC physical ID = 0x2 (2)
  645.       maximum IDs for CPUs in pkg    = 0x4 (4)
  646.       CLFLUSH line size              = 0x8 (8)
  647.       brand index                    = 0x0 (0)
  648.    brand id = 0x00 (0): unknown
  649.    feature information (1/edx):
  650.       x87 FPU on chip                        = true
  651.       VME: virtual-8086 mode enhancement     = true
  652.       DE: debugging extensions               = true
  653.       PSE: page size extensions              = true
  654.       TSC: time stamp counter                = true
  655.       RDMSR and WRMSR support                = true
  656.       PAE: physical address extensions       = true
  657.       MCE: machine check exception           = true
  658.       CMPXCHG8B inst.                        = true
  659.       APIC on chip                           = true
  660.       SYSENTER and SYSEXIT                   = true
  661.       MTRR: memory type range registers      = true
  662.       PTE global bit                         = true
  663.       MCA: machine check architecture        = true
  664.       CMOV: conditional move/compare instr   = true
  665.       PAT: page attribute table              = true
  666.       PSE-36: page size extension            = true
  667.       PSN: processor serial number           = false
  668.       CLFLUSH instruction                    = true
  669.       DS: debug store                        = false
  670.       ACPI: thermal monitor and clock ctrl   = false
  671.       MMX Technology                         = true
  672.       FXSAVE/FXRSTOR                         = true
  673.       SSE extensions                         = true
  674.       SSE2 extensions                        = true
  675.       SS: self snoop                         = false
  676.       hyper-threading / multi-core supported = true
  677.       TM: therm. monitor                     = false
  678.       IA64                                   = false
  679.       PBE: pending break event               = false
  680.    feature information (1/ecx):
  681.       PNI/SSE3: Prescott New Instructions     = true
  682.       PCLMULDQ instruction                    = false
  683.       DTES64: 64-bit debug store              = false
  684.       MONITOR/MWAIT                           = true
  685.       CPL-qualified debug store               = false
  686.       VMX: virtual machine extensions         = false
  687.       SMX: safer mode extensions              = false
  688.       Enhanced Intel SpeedStep Technology     = false
  689.       TM2: thermal monitor 2                  = false
  690.       SSSE3 extensions                        = false
  691.       context ID: adaptive or shared L1 data  = false
  692.       SDBG: IA32_DEBUG_INTERFACE              = false
  693.       FMA instruction                         = false
  694.       CMPXCHG16B instruction                  = true
  695.       xTPR disable                            = false
  696.       PDCM: perfmon and debug                 = false
  697.       PCID: process context identifiers       = false
  698.       DCA: direct cache access                = false
  699.       SSE4.1 extensions                       = false
  700.       SSE4.2 extensions                       = false
  701.       x2APIC: extended xAPIC support          = false
  702.       MOVBE instruction                       = false
  703.       POPCNT instruction                      = true
  704.       time stamp counter deadline             = false
  705.       AES instruction                         = false
  706.       XSAVE/XSTOR states                      = false
  707.       OS-enabled XSAVE/XSTOR                  = false
  708.       AVX: advanced vector extensions         = false
  709.       F16C half-precision convert instruction = false
  710.       RDRAND instruction                      = false
  711.       hypervisor guest status                 = false
  712.    cache and TLB information (2):
  713.    processor serial number = 0010-0F42-0000-0000-0000-0000
  714.    MONITOR/MWAIT (5):
  715.       smallest monitor-line size (bytes)       = 0x40 (64)
  716.       largest monitor-line size (bytes)        = 0x40 (64)
  717.       enum of Monitor-MWAIT exts supported     = true
  718.       supports intrs as break-event for MWAIT  = true
  719.       number of C0 sub C-states using MWAIT    = 0x0 (0)
  720.       number of C1 sub C-states using MWAIT    = 0x0 (0)
  721.       number of C2 sub C-states using MWAIT    = 0x0 (0)
  722.       number of C3 sub C-states using MWAIT    = 0x0 (0)
  723.       number of C4 sub C-states using MWAIT    = 0x0 (0)
  724.       number of C5 sub C-states using MWAIT    = 0x0 (0)
  725.       number of C6 sub C-states using MWAIT    = 0x0 (0)
  726.       number of C7 sub C-states using MWAIT    = 0x0 (0)
  727.    extended processor signature (0x80000001/eax):
  728.       family/generation = 0xf (15)
  729.       model           = 0x4 (4)
  730.       stepping id     = 0x2 (2)
  731.       extended family = 0x1 (1)
  732.       extended model  = 0x0 (0)
  733.       (family synth)  = 0x10 (16)
  734.       (model synth)   = 0x4 (4)
  735.       (simple synth)  = AMD Athlon (unknown type) (Regor/Propus/Shanghai/Callisto/Heka/Deneb RB-C2) [K10], 45nm
  736.    extended feature flags (0x80000001/edx):
  737.       x87 FPU on chip                       = true
  738.       virtual-8086 mode enhancement         = true
  739.       debugging extensions                  = true
  740.       page size extensions                  = true
  741.       time stamp counter                    = true
  742.       RDMSR and WRMSR support               = true
  743.       physical address extensions           = true
  744.       machine check exception               = true
  745.       CMPXCHG8B inst.                       = true
  746.       APIC on chip                          = true
  747.       SYSCALL and SYSRET instructions       = true
  748.       memory type range registers           = true
  749.       global paging extension               = true
  750.       machine check architecture            = true
  751.       conditional move/compare instruction  = true
  752.       page attribute table                  = true
  753.       page size extension                   = true
  754.       multiprocessing capable               = false
  755.       no-execute page protection            = true
  756.       AMD multimedia instruction extensions = true
  757.       MMX Technology                        = true
  758.       FXSAVE/FXRSTOR                        = true
  759.       SSE extensions                        = true
  760.       1-GB large page support               = true
  761.       RDTSCP                                = true
  762.       long mode (AA-64)                     = true
  763.       3DNow! instruction extensions         = true
  764.       3DNow! instructions                   = true
  765.    extended brand id (0x80000001/ebx):
  766.       raw          = 0x10001b76 (268442486)
  767.       BrandId      = 0x1b76 (7030)
  768.       str1         = 0x3 (3)
  769.       str2         = 0x6 (6)
  770.       PartialModel = 0x37 (55)
  771.       PG           = 0x0 (0)
  772.       PkgType      = AM2r2/AM3 (1)
  773.    AMD feature flags (0x80000001/ecx):
  774.       LAHF/SAHF supported in 64-bit mode     = true
  775.       CMP Legacy                             = true
  776.       SVM: secure virtual machine            = true
  777.       extended APIC space                    = true
  778.       AltMovCr8                              = true
  779.       LZCNT advanced bit manipulation        = true
  780.       SSE4A support                          = true
  781.       misaligned SSE mode                    = true
  782.       3DNow! PREFETCH/PREFETCHW instructions = true
  783.       OS visible workaround                  = true
  784.       instruction based sampling             = true
  785.       XOP support                            = false
  786.       SKINIT/STGI support                    = true
  787.       watchdog timer support                 = true
  788.       lightweight profiling support          = false
  789.       4-operand FMA instruction              = false
  790.       TCE: translation cache extension       = false
  791.       NodeId MSR C001100C                    = true
  792.       TBM support                            = false
  793.       topology extensions                    = false
  794.       core performance counter extensions    = false
  795.       NB/DF performance counter extensions   = false
  796.       data breakpoint extension              = false
  797.       performance time-stamp counter support = false
  798.       LLC performance counter extensions     = false
  799.       MWAITX/MONITORX supported              = false
  800.       Address mask extension support         = false
  801.    brand = "AMD Phenom(tm) II X4 955 Processor"
  802.    L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
  803.       instruction # entries     = 0x10 (16)
  804.       instruction associativity = 0xff (255)
  805.       data # entries            = 0x30 (48)
  806.       data associativity        = 0xff (255)
  807.    L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
  808.       instruction # entries     = 0x20 (32)
  809.       instruction associativity = 0xff (255)
  810.       data # entries            = 0x30 (48)
  811.       data associativity        = 0xff (255)
  812.    L1 data cache information (0x80000005/ecx):
  813.       line size (bytes) = 0x40 (64)
  814.       lines per tag     = 0x1 (1)
  815.       associativity     = 0x2 (2)
  816.       size (KB)         = 0x40 (64)
  817.    L1 instruction cache information (0x80000005/edx):
  818.       line size (bytes) = 0x40 (64)
  819.       lines per tag     = 0x1 (1)
  820.       associativity     = 0x2 (2)
  821.       size (KB)         = 0x40 (64)
  822.    L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
  823.       instruction # entries     = 0x0 (0)
  824.       instruction associativity = L2 off (0)
  825.       data # entries            = 0x80 (128)
  826.       data associativity        = 2-way (2)
  827.    L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
  828.       instruction # entries     = 0x200 (512)
  829.       instruction associativity = 4-way (4)
  830.       data # entries            = 0x200 (512)
  831.       data associativity        = 4-way (4)
  832.    L2 unified cache information (0x80000006/ecx):
  833.       line size (bytes) = 0x40 (64)
  834.       lines per tag     = 0x1 (1)
  835.       associativity     = 16-way (8)
  836.       size (KB)         = 0x200 (512)
  837.    L3 cache information (0x80000006/edx):
  838.       line size (bytes)     = 0x40 (64)
  839.       lines per tag         = 0x1 (1)
  840.       associativity         = 48-way (11)
  841.       size (in 512KB units) = 0xc (12)
  842.    RAS Capability (0x80000007/ebx):
  843.       MCA overflow recovery support = false
  844.       SUCCOR support                = false
  845.       HWA: hardware assert support  = false
  846.       scalable MCA support          = false
  847.    Advanced Power Management Features (0x80000007/ecx):
  848.       CmpUnitPwrSampleTimeRatio = 0x0 (0)
  849.    Advanced Power Management Features (0x80000007/edx):
  850.       TS: temperature sensing diode           = true
  851.       FID: frequency ID control               = false
  852.       VID: voltage ID control                 = false
  853.       TTP: thermal trip                       = true
  854.       TM: thermal monitor                     = true
  855.       STC: software thermal control           = true
  856.       100 MHz multiplier control              = true
  857.       hardware P-State control                = true
  858.       TscInvariant                            = true
  859.       CPB: core performance boost             = false
  860.       read-only effective frequency interface = false
  861.       processor feedback interface            = false
  862.       APM power reporting                     = false
  863.       connected standby                       = false
  864.       RAPL: running average power limit       = false
  865.    Physical Address and Linear Address Size (0x80000008/eax):
  866.       maximum physical address bits         = 0x30 (48)
  867.       maximum linear (virtual) address bits = 0x30 (48)
  868.       maximum guest physical address bits   = 0x0 (0)
  869.    Extended Feature Extensions ID (0x80000008/ebx):
  870.       CLZERO instruction                       = false
  871.       instructions retired count support       = false
  872.       always save/restore error pointers       = false
  873.       RDPRU instruction                        = false
  874.       memory bandwidth enforcement             = false
  875.       WBNOINVD instruction                     = false
  876.       IBPB: indirect branch prediction barrier = false
  877.       IBRS: indirect branch restr speculation  = false
  878.       STIBP: 1 thr indirect branch predictor   = false
  879.       STIBP always on preferred mode           = false
  880.       ppin processor id number supported       = false
  881.       SSBD: speculative store bypass disable   = false
  882.       virtualized SSBD                         = false
  883.       SSBD fixed in hardware                   = false
  884.    Size Identifiers (0x80000008/ecx):
  885.       number of CPU cores                 = 0x4 (4)
  886.       ApicIdCoreIdSize                    = 0x2 (2)
  887.       performance time-stamp counter size = 0x0 (0)
  888.    Feature Extended Size (0x80000008/edx):
  889.       RDPRU instruction max input support = 0x0 (0)
  890.    SVM Secure Virtual Machine (0x8000000a/eax):
  891.       SvmRev: SVM revision = 0x1 (1)
  892.    SVM Secure Virtual Machine (0x8000000a/edx):
  893.       nested paging                           = true
  894.       LBR virtualization                      = true
  895.       SVM lock                                = true
  896.       NRIP save                               = true
  897.       MSR based TSC rate control              = false
  898.       VMCB clean bits support                 = false
  899.       flush by ASID                           = false
  900.       decode assists                          = false
  901.       SSSE3/SSE5 opcode set disable           = false
  902.       pause intercept filter                  = false
  903.       pause filter threshold                  = false
  904.       AVIC: AMD virtual interrupt controller  = false
  905.       virtualized VMLOAD/VMSAVE               = false
  906.       virtualized global interrupt flag (GIF) = false
  907.       GMET: guest mode execute trap           = false
  908.       guest Spec_ctl support                  = false
  909.    NASID: number of address space identifiers = 0x40 (64):
  910.    L1 TLB information: 1G pages (0x80000019/eax):
  911.       instruction # entries     = 0x0 (0)
  912.       instruction associativity = L2 off (0)
  913.       data # entries            = 0x30 (48)
  914.       data associativity        = full (15)
  915.    L2 TLB information: 1G pages (0x80000019/ebx):
  916.       instruction # entries     = 0x0 (0)
  917.       instruction associativity = L2 off (0)
  918.       data # entries            = 0x10 (16)
  919.       data associativity        = 8-way (6)
  920.    SVM Secure Virtual Machine (0x8000001a/eax):
  921.       128-bit SSE executed full-width = true
  922.       MOVU* better than MOVL*/MOVH*   = true
  923.       256-bit SSE executed full-width = false
  924.    Instruction Based Sampling Identifiers (0x8000001b/eax):
  925.       IBS feature flags valid                  = true
  926.       IBS fetch sampling                       = true
  927.       IBS execution sampling                   = true
  928.       read write of op counter                 = true
  929.       op counting mode                         = true
  930.       branch target address reporting          = false
  931.       IbsOpCurCnt and IbsOpMaxCnt extend 7     = false
  932.       invalid RIP indication support           = false
  933.       fused branch micro-op indication support = false
  934.       IBS fetch control extended MSR support   = false
  935.       IBS op data 4 MSR support                = false
  936.    (instruction supported synth):
  937.       CMPXCHG8B                = true
  938.       conditional move/compare = true
  939.       PREFETCH/PREFETCHW       = true
  940.    (multi-processing synth) = multi-core (c=4)
  941.    (multi-processing method) = AMD
  942.    (APIC widths synth): CORE_width=2 SMT_width=0
  943.    (APIC synth): PKG_ID=0 CORE_ID=2 SMT_ID=0
  944.    (uarch synth) = AMD K10, 45nm
  945.    (synth) = AMD Phenom II X4 (Deneb RB-C2) 955 Processor [K10], 45nm
  946. CPU 3:
  947.    vendor_id = "AuthenticAMD"
  948.    version information (1/eax):
  949.       processor type  = primary processor (0)
  950.       family          = 0xf (15)
  951.       model           = 0x4 (4)
  952.       stepping id     = 0x2 (2)
  953.       extended family = 0x1 (1)
  954.       extended model  = 0x0 (0)
  955.       (family synth)  = 0x10 (16)
  956.       (model synth)   = 0x4 (4)
  957.       (simple synth)  = AMD Athlon (unknown type) (Regor/Propus/Shanghai/Callisto/Heka/Deneb RB-C2) [K10], 45nm
  958.    miscellaneous (1/ebx):
  959.       process local APIC physical ID = 0x3 (3)
  960.       maximum IDs for CPUs in pkg    = 0x4 (4)
  961.       CLFLUSH line size              = 0x8 (8)
  962.       brand index                    = 0x0 (0)
  963.    brand id = 0x00 (0): unknown
  964.    feature information (1/edx):
  965.       x87 FPU on chip                        = true
  966.       VME: virtual-8086 mode enhancement     = true
  967.       DE: debugging extensions               = true
  968.       PSE: page size extensions              = true
  969.       TSC: time stamp counter                = true
  970.       RDMSR and WRMSR support                = true
  971.       PAE: physical address extensions       = true
  972.       MCE: machine check exception           = true
  973.       CMPXCHG8B inst.                        = true
  974.       APIC on chip                           = true
  975.       SYSENTER and SYSEXIT                   = true
  976.       MTRR: memory type range registers      = true
  977.       PTE global bit                         = true
  978.       MCA: machine check architecture        = true
  979.       CMOV: conditional move/compare instr   = true
  980.       PAT: page attribute table              = true
  981.       PSE-36: page size extension            = true
  982.       PSN: processor serial number           = false
  983.       CLFLUSH instruction                    = true
  984.       DS: debug store                        = false
  985.       ACPI: thermal monitor and clock ctrl   = false
  986.       MMX Technology                         = true
  987.       FXSAVE/FXRSTOR                         = true
  988.       SSE extensions                         = true
  989.       SSE2 extensions                        = true
  990.       SS: self snoop                         = false
  991.       hyper-threading / multi-core supported = true
  992.       TM: therm. monitor                     = false
  993.       IA64                                   = false
  994.       PBE: pending break event               = false
  995.    feature information (1/ecx):
  996.       PNI/SSE3: Prescott New Instructions     = true
  997.       PCLMULDQ instruction                    = false
  998.       DTES64: 64-bit debug store              = false
  999.       MONITOR/MWAIT                           = true
  1000.       CPL-qualified debug store               = false
  1001.       VMX: virtual machine extensions         = false
  1002.       SMX: safer mode extensions              = false
  1003.       Enhanced Intel SpeedStep Technology     = false
  1004.       TM2: thermal monitor 2                  = false
  1005.       SSSE3 extensions                        = false
  1006.       context ID: adaptive or shared L1 data  = false
  1007.       SDBG: IA32_DEBUG_INTERFACE              = false
  1008.       FMA instruction                         = false
  1009.       CMPXCHG16B instruction                  = true
  1010.       xTPR disable                            = false
  1011.       PDCM: perfmon and debug                 = false
  1012.       PCID: process context identifiers       = false
  1013.       DCA: direct cache access                = false
  1014.       SSE4.1 extensions                       = false
  1015.       SSE4.2 extensions                       = false
  1016.       x2APIC: extended xAPIC support          = false
  1017.       MOVBE instruction                       = false
  1018.       POPCNT instruction                      = true
  1019.       time stamp counter deadline             = false
  1020.       AES instruction                         = false
  1021.       XSAVE/XSTOR states                      = false
  1022.       OS-enabled XSAVE/XSTOR                  = false
  1023.       AVX: advanced vector extensions         = false
  1024.       F16C half-precision convert instruction = false
  1025.       RDRAND instruction                      = false
  1026.       hypervisor guest status                 = false
  1027.    cache and TLB information (2):
  1028.    processor serial number = 0010-0F42-0000-0000-0000-0000
  1029.    MONITOR/MWAIT (5):
  1030.       smallest monitor-line size (bytes)       = 0x40 (64)
  1031.       largest monitor-line size (bytes)        = 0x40 (64)
  1032.       enum of Monitor-MWAIT exts supported     = true
  1033.       supports intrs as break-event for MWAIT  = true
  1034.       number of C0 sub C-states using MWAIT    = 0x0 (0)
  1035.       number of C1 sub C-states using MWAIT    = 0x0 (0)
  1036.       number of C2 sub C-states using MWAIT    = 0x0 (0)
  1037.       number of C3 sub C-states using MWAIT    = 0x0 (0)
  1038.       number of C4 sub C-states using MWAIT    = 0x0 (0)
  1039.       number of C5 sub C-states using MWAIT    = 0x0 (0)
  1040.       number of C6 sub C-states using MWAIT    = 0x0 (0)
  1041.       number of C7 sub C-states using MWAIT    = 0x0 (0)
  1042.    extended processor signature (0x80000001/eax):
  1043.       family/generation = 0xf (15)
  1044.       model           = 0x4 (4)
  1045.       stepping id     = 0x2 (2)
  1046.       extended family = 0x1 (1)
  1047.       extended model  = 0x0 (0)
  1048.       (family synth)  = 0x10 (16)
  1049.       (model synth)   = 0x4 (4)
  1050.       (simple synth)  = AMD Athlon (unknown type) (Regor/Propus/Shanghai/Callisto/Heka/Deneb RB-C2) [K10], 45nm
  1051.    extended feature flags (0x80000001/edx):
  1052.       x87 FPU on chip                       = true
  1053.       virtual-8086 mode enhancement         = true
  1054.       debugging extensions                  = true
  1055.       page size extensions                  = true
  1056.       time stamp counter                    = true
  1057.       RDMSR and WRMSR support               = true
  1058.       physical address extensions           = true
  1059.       machine check exception               = true
  1060.       CMPXCHG8B inst.                       = true
  1061.       APIC on chip                          = true
  1062.       SYSCALL and SYSRET instructions       = true
  1063.       memory type range registers           = true
  1064.       global paging extension               = true
  1065.       machine check architecture            = true
  1066.       conditional move/compare instruction  = true
  1067.       page attribute table                  = true
  1068.       page size extension                   = true
  1069.       multiprocessing capable               = false
  1070.       no-execute page protection            = true
  1071.       AMD multimedia instruction extensions = true
  1072.       MMX Technology                        = true
  1073.       FXSAVE/FXRSTOR                        = true
  1074.       SSE extensions                        = true
  1075.       1-GB large page support               = true
  1076.       RDTSCP                                = true
  1077.       long mode (AA-64)                     = true
  1078.       3DNow! instruction extensions         = true
  1079.       3DNow! instructions                   = true
  1080.    extended brand id (0x80000001/ebx):
  1081.       raw          = 0x10001b76 (268442486)
  1082.       BrandId      = 0x1b76 (7030)
  1083.       str1         = 0x3 (3)
  1084.       str2         = 0x6 (6)
  1085.       PartialModel = 0x37 (55)
  1086.       PG           = 0x0 (0)
  1087.       PkgType      = AM2r2/AM3 (1)
  1088.    AMD feature flags (0x80000001/ecx):
  1089.       LAHF/SAHF supported in 64-bit mode     = true
  1090.       CMP Legacy                             = true
  1091.       SVM: secure virtual machine            = true
  1092.       extended APIC space                    = true
  1093.       AltMovCr8                              = true
  1094.       LZCNT advanced bit manipulation        = true
  1095.       SSE4A support                          = true
  1096.       misaligned SSE mode                    = true
  1097.       3DNow! PREFETCH/PREFETCHW instructions = true
  1098.       OS visible workaround                  = true
  1099.       instruction based sampling             = true
  1100.       XOP support                            = false
  1101.       SKINIT/STGI support                    = true
  1102.       watchdog timer support                 = true
  1103.       lightweight profiling support          = false
  1104.       4-operand FMA instruction              = false
  1105.       TCE: translation cache extension       = false
  1106.       NodeId MSR C001100C                    = true
  1107.       TBM support                            = false
  1108.       topology extensions                    = false
  1109.       core performance counter extensions    = false
  1110.       NB/DF performance counter extensions   = false
  1111.       data breakpoint extension              = false
  1112.       performance time-stamp counter support = false
  1113.       LLC performance counter extensions     = false
  1114.       MWAITX/MONITORX supported              = false
  1115.       Address mask extension support         = false
  1116.    brand = "AMD Phenom(tm) II X4 955 Processor"
  1117.    L1 TLB/cache information: 2M/4M pages & L1 TLB (0x80000005/eax):
  1118.       instruction # entries     = 0x10 (16)
  1119.       instruction associativity = 0xff (255)
  1120.       data # entries            = 0x30 (48)
  1121.       data associativity        = 0xff (255)
  1122.    L1 TLB/cache information: 4K pages & L1 TLB (0x80000005/ebx):
  1123.       instruction # entries     = 0x20 (32)
  1124.       instruction associativity = 0xff (255)
  1125.       data # entries            = 0x30 (48)
  1126.       data associativity        = 0xff (255)
  1127.    L1 data cache information (0x80000005/ecx):
  1128.       line size (bytes) = 0x40 (64)
  1129.       lines per tag     = 0x1 (1)
  1130.       associativity     = 0x2 (2)
  1131.       size (KB)         = 0x40 (64)
  1132.    L1 instruction cache information (0x80000005/edx):
  1133.       line size (bytes) = 0x40 (64)
  1134.       lines per tag     = 0x1 (1)
  1135.       associativity     = 0x2 (2)
  1136.       size (KB)         = 0x40 (64)
  1137.    L2 TLB/cache information: 2M/4M pages & L2 TLB (0x80000006/eax):
  1138.       instruction # entries     = 0x0 (0)
  1139.       instruction associativity = L2 off (0)
  1140.       data # entries            = 0x80 (128)
  1141.       data associativity        = 2-way (2)
  1142.    L2 TLB/cache information: 4K pages & L2 TLB (0x80000006/ebx):
  1143.       instruction # entries     = 0x200 (512)
  1144.       instruction associativity = 4-way (4)
  1145.       data # entries            = 0x200 (512)
  1146.       data associativity        = 4-way (4)
  1147.    L2 unified cache information (0x80000006/ecx):
  1148.       line size (bytes) = 0x40 (64)
  1149.       lines per tag     = 0x1 (1)
  1150.       associativity     = 16-way (8)
  1151.       size (KB)         = 0x200 (512)
  1152.    L3 cache information (0x80000006/edx):
  1153.       line size (bytes)     = 0x40 (64)
  1154.       lines per tag         = 0x1 (1)
  1155.       associativity         = 48-way (11)
  1156.       size (in 512KB units) = 0xc (12)
  1157.    RAS Capability (0x80000007/ebx):
  1158.       MCA overflow recovery support = false
  1159.       SUCCOR support                = false
  1160.       HWA: hardware assert support  = false
  1161.       scalable MCA support          = false
  1162.    Advanced Power Management Features (0x80000007/ecx):
  1163.       CmpUnitPwrSampleTimeRatio = 0x0 (0)
  1164.    Advanced Power Management Features (0x80000007/edx):
  1165.       TS: temperature sensing diode           = true
  1166.       FID: frequency ID control               = false
  1167.       VID: voltage ID control                 = false
  1168.       TTP: thermal trip                       = true
  1169.       TM: thermal monitor                     = true
  1170.       STC: software thermal control           = true
  1171.       100 MHz multiplier control              = true
  1172.       hardware P-State control                = true
  1173.       TscInvariant                            = true
  1174.       CPB: core performance boost             = false
  1175.       read-only effective frequency interface = false
  1176.       processor feedback interface            = false
  1177.       APM power reporting                     = false
  1178.       connected standby                       = false
  1179.       RAPL: running average power limit       = false
  1180.    Physical Address and Linear Address Size (0x80000008/eax):
  1181.       maximum physical address bits         = 0x30 (48)
  1182.       maximum linear (virtual) address bits = 0x30 (48)
  1183.       maximum guest physical address bits   = 0x0 (0)
  1184.    Extended Feature Extensions ID (0x80000008/ebx):
  1185.       CLZERO instruction                       = false
  1186.       instructions retired count support       = false
  1187.       always save/restore error pointers       = false
  1188.       RDPRU instruction                        = false
  1189.       memory bandwidth enforcement             = false
  1190.       WBNOINVD instruction                     = false
  1191.       IBPB: indirect branch prediction barrier = false
  1192.       IBRS: indirect branch restr speculation  = false
  1193.       STIBP: 1 thr indirect branch predictor   = false
  1194.       STIBP always on preferred mode           = false
  1195.       ppin processor id number supported       = false
  1196.       SSBD: speculative store bypass disable   = false
  1197.       virtualized SSBD                         = false
  1198.       SSBD fixed in hardware                   = false
  1199.    Size Identifiers (0x80000008/ecx):
  1200.       number of CPU cores                 = 0x4 (4)
  1201.       ApicIdCoreIdSize                    = 0x2 (2)
  1202.       performance time-stamp counter size = 0x0 (0)
  1203.    Feature Extended Size (0x80000008/edx):
  1204.       RDPRU instruction max input support = 0x0 (0)
  1205.    SVM Secure Virtual Machine (0x8000000a/eax):
  1206.       SvmRev: SVM revision = 0x1 (1)
  1207.    SVM Secure Virtual Machine (0x8000000a/edx):
  1208.       nested paging                           = true
  1209.       LBR virtualization                      = true
  1210.       SVM lock                                = true
  1211.       NRIP save                               = true
  1212.       MSR based TSC rate control              = false
  1213.       VMCB clean bits support                 = false
  1214.       flush by ASID                           = false
  1215.       decode assists                          = false
  1216.       SSSE3/SSE5 opcode set disable           = false
  1217.       pause intercept filter                  = false
  1218.       pause filter threshold                  = false
  1219.       AVIC: AMD virtual interrupt controller  = false
  1220.       virtualized VMLOAD/VMSAVE               = false
  1221.       virtualized global interrupt flag (GIF) = false
  1222.       GMET: guest mode execute trap           = false
  1223.       guest Spec_ctl support                  = false
  1224.    NASID: number of address space identifiers = 0x40 (64):
  1225.    L1 TLB information: 1G pages (0x80000019/eax):
  1226.       instruction # entries     = 0x0 (0)
  1227.       instruction associativity = L2 off (0)
  1228.       data # entries            = 0x30 (48)
  1229.       data associativity        = full (15)
  1230.    L2 TLB information: 1G pages (0x80000019/ebx):
  1231.       instruction # entries     = 0x0 (0)
  1232.       instruction associativity = L2 off (0)
  1233.       data # entries            = 0x10 (16)
  1234.       data associativity        = 8-way (6)
  1235.    SVM Secure Virtual Machine (0x8000001a/eax):
  1236.       128-bit SSE executed full-width = true
  1237.       MOVU* better than MOVL*/MOVH*   = true
  1238.       256-bit SSE executed full-width = false
  1239.    Instruction Based Sampling Identifiers (0x8000001b/eax):
  1240.       IBS feature flags valid                  = true
  1241.       IBS fetch sampling                       = true
  1242.       IBS execution sampling                   = true
  1243.       read write of op counter                 = true
  1244.       op counting mode                         = true
  1245.       branch target address reporting          = false
  1246.       IbsOpCurCnt and IbsOpMaxCnt extend 7     = false
  1247.       invalid RIP indication support           = false
  1248.       fused branch micro-op indication support = false
  1249.       IBS fetch control extended MSR support   = false
  1250.       IBS op data 4 MSR support                = false
  1251.    (instruction supported synth):
  1252.       CMPXCHG8B                = true
  1253.       conditional move/compare = true
  1254.       PREFETCH/PREFETCHW       = true
  1255.    (multi-processing synth) = multi-core (c=4)
  1256.    (multi-processing method) = AMD
  1257.    (APIC widths synth): CORE_width=2 SMT_width=0
  1258.    (APIC synth): PKG_ID=0 CORE_ID=3 SMT_ID=0
  1259.    (uarch synth) = AMD K10, 45nm
  1260.    (synth) = AMD Phenom II X4 (Deneb RB-C2) 955 Processor [K10], 45nm